Description
Research, architect, design, and verify integrated circuits (analog, digital, or mixed-signal) and SoCs for commercial, industrial, automotive, aerospace, or scientific use. Apply semiconductor device physics and materials knowledge with EDA tools to implement, optimize, and test ICs, driving IP integration, physical signoff, and silicon validation to meet power, performance, area, and reliability goals.
- • Architect and design analog, digital, or mixed-signal IC blocks and subsystems to meet PPA and reliability targets.
- • Write RTL (Verilog/SystemVerilog/VHDL) or create schematics for circuit implementation.
- • Develop and run simulations (functional, SPICE, mixed-signal) and create testbenches to verify designs.
- • Perform synthesis, floorplanning, place-and-route, and timing closure for digital designs.
- • Collaborate with layout to optimize placement, routing, matching, and parasitic performance.
- • Execute physical verification and signoff (DRC, LVS, ERC, antenna, ESD/latch-up).
- • Generate and validate timing, power, and behavioral models (Liberty, IBIS, Verilog-A/AMS).
- • Plan and conduct design-for-test insertion (scan, BIST, MBIST) and ATPG coverage analysis.
- • Prepare design specifications, interface definitions, and datasheets.
- • Evaluate feasibility, technology nodes, IP options, and die area/cost trade-offs.
- • Coordinate tapeout, mask generation, and handoff to foundry and packaging.
- • Develop bring-up plans and validate first silicon in the lab; debug and root-cause issues.
- • Define and execute characterization, corner/Monte Carlo, and reliability/stress testing.
- • Prepare and maintain design documentation, version control, and change notices.
- • Provide technical guidance to cross-functional teams in layout, test, firmware, and manufacturing.
- • Ensure compliance with applicable standards and regulations (e.g., JEDEC, IEEE, automotive).
- • Implement low-power design techniques (clock gating, power gating, DVFS) and power intent (UPF/CPF).
- • Use EDA tools (Cadence, Synopsys, Siemens/Mentor) and scripts to automate flows and reports.
- • Track schedule, risks, and metrics; support project reviews and cost/performance assessments.
- • Define constraints and perform static timing, signal integrity, and power analysis.
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Last reviewed: Jan 2026
